Difference between revisions of "APEmille project"
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'''A PARALLEL PROCESSOR IN THE TERAFLOPS RANGE''' | '''A PARALLEL PROCESSOR IN THE TERAFLOPS RANGE''' | ||
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| + | This document describes APEmille, a 3-D SIMD scalable parallel processor in the Teraflop range. This machine is very efficient for LGT simulations as well as for a broader class of numeric applications requiring massive intensive floating point computations. | ||
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| + | [[1. Architectural Overview]] | ||
| + | [[2. Topology]] | ||
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| + | 2. Topology | ||
| + | 3. Processing Board | ||
| + | 4. Processing Node | ||
| + | 5. Tmille | ||
| + | 6. Jmille | ||
| + | 7. Cmille | ||
| + | 8. PB interconnections | ||
| + | 9. Memory | ||
| + | 10. Software | ||
Revision as of 08:11, 5 October 2006
APEmille
A PARALLEL PROCESSOR IN THE TERAFLOPS RANGE
This document describes APEmille, a 3-D SIMD scalable parallel processor in the Teraflop range. This machine is very efficient for LGT simulations as well as for a broader class of numeric applications requiring massive intensive floating point computations.
1. Architectural Overview 2. Topology
2. Topology
3. Processing Board
4. Processing Node
5. Tmille
6. Jmille
7. Cmille
8. PB interconnections
9. Memory
10. Software
