CASTNESS'07 Workshop and School

Computing Architectures and Sw Tools for Numerical Embedded Scalable Systems 15th-17th January 2007 in Roma - Italy.

Please find attached at the end of this page the presentations


The first day (CASTNESS WORKSHOP) is composed of 20 minute talks from senior academic and industrial researchers and european/national research officers.

The second and third days (CASTNESS SCHOOL) of this first edition hosts 2 hours in depth lessons about current research activities on exploration/generation tools of system sw and hw. The lessons of the school will be delivered by senior or brilliant junior academic and industrial researchers.

CASTNESS'07 will also host half day brainstorming sessions and/or Shapes meetings in parallel to the School session.

NOTE This first edition will focus on the architecture of HW ad System SW. Next year edition: CASTNESS'08 will incorporate application feedback.

Programme Committee

Ahmed Jerraya, Rainer Leupers, Pier Stanislao Paolucci, Lothar Thiele, Piero Vicini.

AGENDA 15 January 2007 -FIRST DAY, WORKSHOP - short talks (20' each + 5' discussion)


  • 07:45-08:30 (Aula M. Conversi - Dip. Fisica - Building Guglielmo Marconi)


  • 08:30-08:40 - INFN and Dip. Fisica Roma, Univ. “La Sapienza”


  • 08:40-09:00 - Luca Benini - Universita' di Bologna - Communication Centric Architectures

SARC Project

  • 09:05-09:25 - G.N.Gaydadjiev - TU Delft - SARC Overview

short break 09:30-09:40

AETHER Project

  • 09:40-10:00 - Christian Gamrat - CEA - The concept of Self-Adaptive computing in AETHER
  • 10:05-10:25 - Sven-Bodo Scholz - Univeristy of Hertfordshire(UK) - Software environnement for self-adaptive computing systems

coffe break 10:30-10:55

SHAPES Project (part I)

  • 10:55-11:15 - Pier S. Paolucci - ATMEL and INFN - SHAPES Tiled HW Architecture
  • 11:20-11:40 - Lothar Thiele - ETHZ - Scalable Software Construction in SHAPES
  • 11:45-12:05 - Ahmed Jerraya - TIMA - Programming Models and Hardware dependant Software Abstraction for MPSoC

short break 12:10-12:20

  • 12:20-12:40 - Rainer Leupers - RWTH-AACHEN - MPSoC Virtual Platforms
  • 12:45-13:05 - Gert Goossens - TARGET - Generation techniques of VLIW Compilers

Buffet Lunch 13:10-14:00

SHAPES Project (part II)

  • 14:00-14:20 - Dominique Ragot - THALES - A Software Infrastructure for Managing Complexity and Performance of Applications in MPSoC
  • 14:25-14:45 - Marcello Coppola - ST Microelectronics - STNOC: An evolution towards MPSoC era

short break 14:50-15:00

  • 15:00-15:20 - Davide Rossetti/Piero Vicini - INFN - From the Distributed Network Processor of SHAPES to a Petaflops Ape proposal


  • 15:25-15:45 - Patrick Van Hove - European Commission

HARTES Project

  • 15:50-16:10 - Piergiovanni Bazzana - Atmel Roma - HARTES (Holistic Approach to Real Time Embedded Systems) Overview

coffe break 16:15-16:40

  • 16:40-17:00 - Donatella Sciuto - Polimi - Modeling and Simulation of System-on-Chip Platforms
  • 17:05-17:25 - Wayne Luk - Imperial College - Reconfigurable Processor Design


  • 17:30-17:50 - Philippe Bonnot - Thales TRT - Application Programming design flow for the Morpheus heterogeneous dynamically reconfigurable platform

short break 17:55-18:05


  • 18:05-18:25 - Mauro Olivieri - Univ Roma1 - Dealing with Dynamic and Leakage Energy Dissipation trough Code Optimization and Scratchpad Memories


  • 18:30-18:50 - Peter Marwedel - Get Rid of Caches: Compiler Techniques for Scratch-pads - Univ Dortmund+ICD




  • 21:00-...

AGENDA 16-17 January 2007 -2nd and 3rd DAY, SCHOOL: lessons (2h each)

NOTE: Each 2 hours lesson will be split in 3 slots of 40 minutes.

This year the focus of the school focuses on tools and methodologies for automated generation of System Software.

January 16th

  • Peter Marwedel - Univ Dortmund+ICD - Memory-architecture aware compilation (2h)
  • Lothar Thiele, Iuliana Bacivarov - ETHZ - Design Space Exploration for MPSoC (40'); Modular Performance Analysis - Models, Methods and Scenarios (40'); Modular Performance Analysis - Real-Time Calculus (40').
  • Gert Goossens - TARGET Compiler Technologies - Leuven - How a Retargetable Tool Suite for ASIP Design Enables Next-Generation Multi-Processor Systems-on-Chip (2h)
January 17th
  • Katalin Popovici, Xavier Guérin, Frédéric Rousseau & Wassim Youssef - TIMA GRENOBLE - Modeling MPSoC Running Multithread Software at Different Abstraction Levels Using Simulink & systemC (40'); Multithread Software Code Generation from Simulink (40'); Application of Software Code Generation Flow from Simulink to Diopsys Platform (40').
  • Torsten Kempf - RWTH-AACHEN - MPSoC Exploration Technology (2h)
  • Pier Stanislao Paolucci - ATMEL and INFN, Andrea Ricciardi and Elena Pastorelli - ATMEL Roma - Architecture of mAgicV VLIW DSP and Diopsis 940 MPSoC (40'); Generation of the optimizing mAgicV VLIW DSP C Compiler (40'); Generation of optimized DSP library written in C for mAgicV VLIW DSP (40');

Refer to CastNess07SchoolAbstracts for the detailed program of the school.


The objective is cross-dissemination among SHAPES, projects like SARC and AETHER, HARTES, the APE Massive Parallel Processor initiative, and the academic and industrial research community sharing the topics addressed by those project. The community addressed by ARTIST2 and ARTEMIS are warmly welcome.

During CASTNESS'07 it will be also presented the INFN Petaflops Ape project proposal, which is assumed to start during 2007, allowing the actual exploitation onto a physically working peta-flops system.

CASTNESS'07 started as a dissemination event promoted by SHAPES (Scalable Software Hardware Architecture Platform for Embedded Systems): a FET-ACA IST-FP6 Integrated Project started in January 2006. The objective of SHAPES is to design a Tiled HW Architecture supported by a Communication Centric System SW, benchmarked on Embedded Numerical Applications (visit

Available Grants for PhD Students and Researchers

ARTIST2 provided grants covering travel expenses of researchers not already involved as SHAPES team members. The attribution of the grants was directly managed by ARTIST2.

The strategic objective of the ARTIST2 Network of Excellence is to strengthen European research in Embedded Systems Design, and promote the emergence of this new multi-disciplinary area. Operationally, this is achieved by integrating the teams, and buiding excellence. We gather together the best European teams from the composing disciplines, and will work to forge a scientific community. Integration will be achieved around a Joint Programme of Activities, aiming to create critical mass from the selected European teams.


In a nice atmosphere, you could exchange impression about the event, the topics discussed or maybe just simply relax at the social dinner, enjoying good food and wine.

The social dinner will cost 40Euro/p to be payed (cash)at the CASTNESS registration, the 15th in the morning.

After payment you will receive a voucher, and at the restaurant you will get a receipt at your name and, of course, your dinner!

If you would like to be part of the social dinner, we would appreciate if you could send us a confirmation at, within week 51.

Proceed herefrom to CastNess07Registration, CastNess07ParticipantList, CastNess07Hotels, CastNess07Location, CastNessRomaMaps, CastNess07SchoolAbstracts, CastNess07Pictures .


-- PierPaolucci - 06 Sep 2006

Topic attachments
I Attachment Action Size Date Who Comment
PDFpdf 01-2007-ROME-School_DSE.pdf manage 1226.6 K 2007-01-15 - 14:30 IulianaBacivarov Iuliana Bacivarov - Design Space Exploration for MPSoC
PDFpdf 07-01-marwedel-shapes-tutorial.pdf manage 2121.9 K 2007-01-11 - 11:58 CarloSidore Marwedel Shapes tutorial
PDFpdf 07castnessLuk.pdf manage 1243.7 K 2007-01-16 - 10:56 MersiaPerra Wayne Luk: Slides
PDFpdf CASTNESS20070115.pdf manage 631.2 K 2007-01-12 - 19:15 MersiaPerra P. van Hove- Slides
PDFpdf CASTNESS_program.pdf manage 59.2 K 2007-01-12 - 15:22 MersiaPerra Final Program
PDFpdf CommDomArchiBenini.pdf manage 808.9 K 2007-01-11 - 13:49 CarloSidore Luca Benini Slides
PDFpdf DonatellaSciutoSlides.pdf manage 350.4 K 2007-01-11 - 12:23 CarloSidore Donatella Sciuto Slides
PDFpdf Goossens-Castness-School-070116.pdf manage 2633.8 K 2007-01-17 - 10:12 GertGoossens Goossens - How a retargetable tool suite for ASIP design enables next-generation multi-processor systems-on-chip
PDFpdf Goossens-Castness-Workshop-070115.pdf manage 1145.6 K 2007-01-17 - 10:03 GertGoossens Goossens - Generation of Efficient C Compilers for VLIW-DSPs
PowerPointppt Hartes_Management_Summary.ppt manage 4359.5 K 2007-01-08 - 10:09 PierPaolucci Bazzana
PowerPointppt Jerraya_Castness.ppt manage 652.0 K 2007-01-05 - 14:51 WassimYoussef Jerraya CastNess07 slides
PDFpdf Kempf_CASTNESS2007.pdf manage 4508.0 K 2007-01-12 - 09:59 CarloSidore Torsten Kempf Slides
PDFpdf MPA.pdf manage 5773.4 K 2007-01-10 - 10:28 IulianaBacivarov Lothar Thiele - Modular Performance Analysis
PowerPointppt Paolucci_CASTNESS07_Objectives.ppt manage 32.5 K 2007-01-14 - 21:38 PierPaolucci 3 introduction slides about CASTNESS'07 Objectives
PowerPointppt Paolucci_SHAPES_HW_CASTNESS_2007.ppt manage 2643.0 K 2007-01-14 - 22:38 PierPaolucci Paolucci SHAPES HW overview
PowerPointppt Pastorelli_ATMEL.ppt manage 280.5 K 2007-01-12 - 17:00 ElenaPastorelli Pastorelli Castness'07 slides
PDFpdf RL-castness-2007.pdf manage 1041.5 K 2007-01-11 - 12:10 CarloSidore Rainer Leupers Slides
PDFpdf RTC.pdf manage 688.1 K 2007-01-10 - 10:29 IulianaBacivarov Lothar Thiele - Real-Time Calculus
PowerPointppt Rousseau_Castness.ppt manage 634.5 K 2007-01-12 - 17:45 WassimYoussef Frederic Rousseau slides
PDFpdf SARC_CASTNESS_15012006.pdf manage 289.5 K 2007-01-15 - 13:21 MersiaPerra SARC, G.Gaydadjiev: Slides
PDFpdf SoftwareShapes.pdf manage 1076.4 K 2007-01-13 - 21:03 PierPaolucci  
PowerPointppt TRT_presentation05Bonnot.ppt manage 432.5 K 2007-01-11 - 12:11 CarloSidore Philippe Bonnot Slides
PDFpdf castness07Ragot.pdf manage 818.5 K 2007-01-11 - 12:00 CarloSidore Dominique Ragot Slides
PDFpdf flyer_CastNess07_v2.4.pdf manage 1108.9 K 2007-01-12 - 16:02 FrancescaLoCicero Final version
PowerPointppt mAgicV_compiler_castness.ppt manage 301.5 K 2007-03-08 - 14:42 AndreaRicciardi mAgicV compiler presentation
Topic revision: r82 - 2007-03-08 - 14:42:02 - AndreaRicciardi
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